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memory

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Flash

hot_img SK Hynix: The competition in AI data centers is shifting from single chips to overall infrastructure architecture

SK Hynix stated in a recent article that the competition in AI is shifting from the performance of individual chips to the design and operation of the entire infrastructure architecture. The competitiveness of AI data centers no longer depends on individual components, but on whether the five key elements of computing, memory, storage, networking, and power cooling can be seamlessly integrated.The article points out that the continuous expansion of AI model scales has led to a surge in demand for computing power and data movement. Training requires repeatedly reading massive datasets, while inference relies on quickly retrieving user request information, both of which place higher demands on the system architecture of data centers. At the memory level, HBM, server DRAM, and others have formed a hierarchical system, each undertaking different bandwidth and capacity tasks. At the networking level, as large-scale training and inference rely on multi-server parallel processing, networking has become a key factor determining the scalability of data centers. System design is shifting from single-server to whole rack and cluster-level expansion.According to Omdia's forecast, the AI data center chip market will grow from $123 billion in 2024 to $207 billion in 2025, reaching $286 billion by 2030. SK Hynix also mentioned that Microsoft's Fairwater data center in Wisconsin is about the length of five football fields, indicating that infrastructure is being deployed on a larger scale. SK Hynix emphasizes that memory is becoming a key layer connecting computing and data.

hot_img Micron: The value of memory in the system has increased from 10% to nearly 50%, and the demand for AI agents is in the "pre-season warm-up" stage

Micron Technology stated to Deutsche Bank at the FMS 2026 conference that AI is reshaping the memory industry landscape, with the proportion of memory in the total value of systems rising from about 10% thirty years ago to nearly 50% currently, and this trend is accelerating. Currently, both DRAM and NAND are in a state of supply shortage. Due to the need for physical disassembly of systems for memory upgrades, the demand for memory in AI systems is more rigid, and price elasticity is lower than market expectations. The Strategic Customer Agreement (SCA) is expected to cover about 40% of sales, providing a price stability mechanism for both parties.Micron's management described the demand for CPU-side AI Agents as "pre-season warm-up," viewing it as a new pillar of growth outside the GPU ecosystem. For emerging technologies like SRAM, Micron believes their scalability is limited and cannot challenge the core position of HBM, with only about 5% of systems currently running such specific workloads. Deutsche Bank maintains a "Buy" rating, believing Micron has a unique advantage of "growth without sacrificing profits." During FMS, Sandisk and SK Hynix jointly released the first HBF technical specifications, but Micron believes that its actual value and commercialization prospects remain controversial.

Western Digital CPO: Flash memory handles the present, HDD manages the entire lifecycle

Ahmed Shihab, Chief Product Officer of Western Digital, stated that the key to AI storage competition is not simply pursuing the fastest medium, but whether it can continuously scale capacity at an affordable cost. He believes that many architectures run well in the early stages, but when the data scale grows from several PB to hundreds of PB or even EB levels, issues may arise due to uncontrolled costs.Flash storage is suitable for high-performance, low-latency scenarios such as model weights, GPU overflow, KV caches, and session contexts; HDDs are more suitable for large-scale, long-term storage, and cost-sensitive data such as training corpora, logs, checkpoints, compliance records, synthetic data, and inference outputs. He summarized: "Flash handles the present, HDD handles the entire lifecycle."At the scale of AI, storage costs themselves will become an architectural issue. Long-term storage of large volumes of data on high-performance media will crowd out budgets for computing, networking, power, and personnel. For many bulk storage workloads, the issue is not whether flash can store, but whether customers can afford the total cost of using flash in the long term.In the future, AI storage will not be dominated by a single technology, but should be designed in layers based on performance, cost, power consumption, density, reliability, and data lifecycle. He emphasized that this is not a competition between flash and HDD, but rather a need to match the appropriate medium for different workloads from the very beginning; otherwise, the architecture may impact business sustainability as it scales.

Marvell launches AI "memory decoupling" architecture to address the bandwidth bottleneck of Agentic AI inference

According to official news, Marvell Technology announced the launch of a new generation of memory solution portfolio for AI infrastructure, covering server-level AI storage, rack-level CXL memory expansion and pooling, as well as multi-rack optical interconnect shared memory, aimed at addressing the growing memory capacity and bandwidth bottlenecks in Agentic AI inference processes.Marvell stated that as AI model sizes increase, context windows extend, and KV Cache demand grows, traditional tightly coupled architectures of computing and memory are limiting AI inference efficiency. Through memory disaggregation, memory resources can be made more independent of computing resource expansion, improving GPU utilization and reducing data movement latency. The products released include:Bravera SC6 PCIe 6.0 SSD controller: Designed for AI inference storage scenarios, it helps cloud service providers migrate more KV Cache to high-performance SSDs, enhancing infrastructure efficiency. This product features an architecture compatible with multi-vendor NAND and is expected to begin sampling in the fourth quarter of 2026.Marvell Structera X memory expansion solution: Based on CXL technology, it supports rack-level memory expansion and resource pooling, helping data centers share and allocate memory resources more flexibly, reducing AI infrastructure costs.Marvell Photonic Fabric optical interconnect memory solution: Constructs a shared memory architecture across multiple racks using optical interconnect technology, supporting up to 32TB warm KV Cache offloading and helping AI inference clusters enhance throughput capacity.Marvell stated that the Photonic Fabric solution can achieve a 2 to 3 times increase in Token throughput under existing data center space and power consumption constraints, supporting larger scale models and longer context AI applications.Marvell executive Will Chu stated that AI infrastructure is transitioning from a single server architecture to a system where computing, memory, and connectivity operate in synergy, and in the future, memory needs to expand more independently to enhance resource utilization and Token efficiency.As the demand for AI Agents and large model inference continues to grow, memory capacity, bandwidth, and data transfer efficiency are becoming new focal points of competition in AI infrastructure, following computing power.
2026-08-04

Changxin Memory is considering building a second DRAM wafer factory in Beijing and is in talks for financing support

According to Reuters, informed sources say that Changxin Storage is considering building a second 12-inch DRAM wafer fab in Beijing's Yizhuang and is negotiating financing with the Beijing Economic and Technological Development Zone and several state-owned technology companies. The company is seeking at least 60 million yuan (approximately 8.9 million USD) in support, but negotiations are still in the early stages, and the scale and structure of the financing may be adjusted.The proposed factory will be located at the site of Changxin Storage's existing DRAM wafer fab in Beijing. The planned production capacity and total investment for the project have not yet been determined, while building a fab capable of producing advanced DRAM typically requires over 10 billion USD. Currently, Changxin Storage operates two 12-inch DRAM wafer fabs in Hefei and one in Beijing, each with a monthly production capacity of about 100,000 wafers. Changxin Storage is also building new factories in Shanghai and Hefei, and once the related projects are fully operational, the company's monthly production capacity could double to over 600,000 wafers.This expansion comes as demand for storage chips is driven by AI infrastructure, data centers, and consumer electronics entering an upward cycle. The company completed an 8.6 billion USD IPO last month, marking the largest fundraising for a semiconductor company listed in mainland China, and its stock price has risen by 13% since going public. Changxin Storage is currently the fourth largest DRAM manufacturer in the world, but Samsung Electronics, SK Hynix, and Micron together still account for nearly 90% of the global market share in the first quarter. Beijing and Shanghai are also providing funding and other support to Changxin Storage to gain economic and strategic benefits from its expansion.
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